Semiconductor structure and method of forming the same
US8507920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2011 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Jul 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the disclosure includes a semiconductor structure. The semiconductor structure includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and different from the first III-V compound layer in composition. An interface is defined between the first III-V compound layer and the second III-V compound layer. A gate is disposed on the second III-V compound layer. A source feature and a drain feature are disposed on opposite side of the gate. Each of the source feature and the drain feature includes a corresponding metal feature at least partially embedded in the second III-V compound layer. A corresponding intermetallic compound underlies each metal feature. Each intermetallic compound contacts a carrier channel located at the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.