Semiconductor devices having on-die termination structures for reducing current consumption and termination methods performed in the semiconductor devices
US8508251B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2010 |
| Grant date | Aug 13, 2013 |
| Priority date | — |
| Expiry date | Aug 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Example embodiments disclose a semiconductor device having an on-die termination (ODT) structure that reduces current consumption, and a termination method performed in the semiconductor device. The semiconductor device includes a calibration circuit for generating calibration codes in response to a reference voltage and a voltage of a calibration terminal connected to an external resistor and an on-die termination device for controlling a termination resistance of a data input/output pad in response to the calibration codes and an on-die termination control signal. The termination resistance of the data input/output pad is greater than a resistance of the calibration terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.