Edge termination region of a semiconductor device

US8513733B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Steven Peake · Warrington, GB
• Philip Rutter · Stockport, GB

Key dates

• Filing date: Aug 15, 2011
• Grant date: Aug 20, 2013
• Expiry date: Sep 9, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

An isolation region (14) is formed between an edge termination region (2) having deep trenches (20,34) and the central region (4). The isolation region includes gate fingers (18) extending from the edge gate trench regions (28) to the gate trenches (6) in the central region (4) to electrically connect the edge gate trench regions to the gate trenches (6) in the central region. The isolation region also includes isolation fingers (22,24) extending from the edge termination region (2) towards the central region (4) and gate between the gate fingers (18) for reducing the breakdown voltage with a RESURF effect.