Multi-chip package having semiconductor chips of different thicknesses from each other and related device
US8513802B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2011 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Apr 30, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06555
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having semiconductor chips of different thicknesses is provided. The semiconductor device may include a first semiconductor chip, a sub-board on a first side of the first semiconductor chip, at least one second semiconductor chip on a second side of the first semiconductor chip, at least one external contact terminal on the at least one second semiconductor chip. In example embodiments the at least one second semiconductor chip may include a plurality of through silicon vias and the at least one external contact terminal may be in electrical contact with the first semiconductor chip and the at least one second semiconductor chip via the plurality of through silicon vias. In example embodiments, the at least one second semiconductor chip may be thinner than the first semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.