PLL circuit, and radio communication apparatus equipped with same
US8515374B2 · kind B2 · utility
4Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2010 |
| Grant date | Aug 20, 2013 |
| Priority date | — |
| Expiry date | Aug 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an ADPLL circuit, on the basis of a gain of a digitally controlled oscillator estimated when a loop gain of a certain value is set in the loop filter and on the basis of a device parameter of the digitally controlled oscillator, the DCO gain estimation unit estimates a gain of the digitally controlled oscillator when a loop gain of another value is set in the loop filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.