CMOS image sensor pixel without internal sample/hold circuit
US8520100B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2009 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | May 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A very small area CMOS image sensor, e.g., for an endoscopic system, includes only four pads (power, ground, digital in, analog out), and includes an array of 4T pixels and associated control circuitry for performing correlated double sampling (CDS) to generate analog reset level and analog signal level values associated with light detected by photodiodes in each pixel. Instead of processing the analog values on-chip, the analog reset values and analog signal values are transmitted in separate sets one row at a time along with interleaved synchronization signals by way of a single analog contact pad, e.g., to a host device of an endoscopic system, which uses the synchronization signals to reconstruct the sensor's internal clock in order to process the analog values. An endoscope housing incorporating the CMOS image sensor thus requires only four wires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.