Accelerating automatic test pattern generation in a multi-core computing environment via speculatively scheduled sequential multi-level parameter value optimization

US8521464B2 · kind B2 · utility

Assignee

• SYNOPSYS, INC. · US

Inventors

• Ashwin Kumar · Bengaluru, IN
• Ramakrishnan Balasubramanian · Saint Paul, US
• Rohit Kapur · Cupertino, US
• Rajesh Uppuluri · Bengaluru, IN
• Jyotirmoy Saikia · Bengaluru, IN
• Parthajit Bhattacharya · Bengaluru, IN
• Sunil Reddy Tiyyagura · Bengaluru, IN

Key dates

• Filing date: Jun 3, 2010
• Grant date: Aug 27, 2013
• Expiry date: May 7, 2031

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318335
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Systems and methods provide acceleration of automatic test pattern generation in a multi-core computing environment via multi-level parameter value optimization for a parameter set with speculative scheduling. The methods described herein use multi-core based parallel runs to parallelize sequential execution, speculative software execution to explore possible parameter sets, and terminate/prune runs when the optimum parameter value is found at a previous level. The present invention evaluates the design prior to the implementation of the compression IP so that it can define the configuration of DFT and ATPG to maximize the results of compression as measured by test data volume and test application time.