Method of testing asynchronous modules in semiconductor device
US8522089B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 21, 2011 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Oct 26, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/50012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of testing a semiconductor device that includes first and second mutually asynchronous modules, a buffer for storing transaction data for read/write operations from the first module and transferring it to the second module synchronously with the data rate of the second module, and an inhibit input. The second module receives the transaction data from the buffer and transfers the data to a data output when the inhibit signal is de-asserted and not when the inhibit signal is asserted. The method of testing includes repeatedly: asserting the inhibit signal; providing test transaction data to the first module and storing the data in the buffer while the inhibit signal is asserted; de-asserting the inhibit signal so that the second module transfers test transaction data received from the buffer to the data output synchronously with the data rate of the second module; and capturing deterministically test transaction data from the output of the second module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.