Semiconductor device and method for fabricating the same
US8524554B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 16, 2012 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Oct 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A dual work function semiconductor device and method for fabricating the same are disclosed. In one aspect, a device includes a first and second transistor on a first and second substrate region. The first and second transistors include a first gate stack having a first work function and a second gate stack having a second work function respectively. The first and second gate stack each include a host dielectric, a gate electrode comprising a metal layer, and a second dielectric capping layer therebetween. The second gate stack further has a first dielectric capping layer between the host dielectric and metal layer. The metal layer is selected to determine the first work function. The first dielectric capping layer is selected to determine the second work function.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.