Method for fabricating a patterned structure of a semiconductor device
US8524608B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2012 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Apr 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for fabricating a patterned structure in a semiconductor device, which includes the following processes. First, a target layer, a first mask and a first patterned mask are sequentially formed on a substrate. Then, a first etching process is performed to form a plurality of characteristic structures on the substrate, wherein each of the characteristic structures comprises a patterned first mask and a patterned target layer. A second patterned mask is formed on the substrate, wherein the second patterned mask covers a portion of the characteristic structures and exposes a predetermined region. A second etching process is performed to fully eliminate the characteristic structures within the predetermined region. Finally, a third etching process is performed to fully eliminate the target layer not covered by the patterned first mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.