Multilayer wiring board and method for manufacturing the same
US8525041B2 · kind B2 · utility
3Cited by
5References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2009 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Oct 5, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wiring board has a substrate, a conductive pattern formed over the substrate, and an electronic component mounted to the substrate and having an electrode. The electrode of the electronic component is connected to the conductive pattern through a via hole. The thickness of the electrode of the electronic component is made less than the thickness of the conductive pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.