Semiconductor memory device and method of operating the same
US8526239B2 · kind B2 · utility
411Cited by
3References
18Claims
0Family size
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Key dates
| Filing date | Apr 28, 2011 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Sep 27, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/344
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory string coupled to a bit line, a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation, and a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.