Data transfer optimized software cache for regular memory references
US8527974B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 28, 2008 |
| Grant date | Sep 3, 2013 |
| Priority date | — |
| Expiry date | Oct 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0848
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Mechanisms are provided for optimizing regular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which regular memory references access a storage of a software cache of a data processing system through a high locality cache mechanism of the software cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.