Methods for manufacturing arrays for CMOS imagers

US8530264B2 · kind B2 · utility

Assignee

• IMEC · BE

Inventors

• Koen De Munck · Leuven, BE
• Kiki Minoglou · Leuven, BE
• Joeri De Vos · Vlissingen, NL

Key dates

• Filing date: Aug 1, 2011
• Grant date: Sep 10, 2013
• Expiry date: Aug 1, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F39/807

Abstract

Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side.