Memory element transistors with reversed-workfunction gate conductors

US8530976B1 · kind B1 · utility

Assignee

• Altera Corporation · US

Inventors

• Albert Ratnakumar · San Jose, US
• Qi Xiang · San Jose, US
• Jun Liu · 红钢城街道, CN

Key dates

• Filing date: May 23, 2011
• Grant date: Sep 10, 2013
• Expiry date: Nov 28, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Integrated circuits may be provided that include memory elements that produce output control signals and corresponding programmable logic circuitry that receives the output control signals from the memory elements. The memory elements may include bistable storage elements formed from circuits such as cross-coupled inverters. The inverters may include n-channel metal-oxide-semiconductor transistors with p-metal gate conductors and n-channel metal-oxide-semiconductor transistors with p-metal gate conductors. These gate conductor assignments are the reverse of the gate conductor assignments used in the n-channel and p-channel transistors in other circuitry such as the programmable logic circuitry. The reversed gate conductor assignments increase the threshold voltages of the transistors in the memory elements to improve reliability in scenarios in which the memory elements are overdriving pass transistors in the programmable logic circuitry.