Package structure of three-dimensional stacking dice and method for manufacturing the same
US8531009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2008 |
| Grant date | Sep 10, 2013 |
| Priority date | — |
| Expiry date | Sep 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention provides a package structure of three-dimensional stacking dice and its manufacturing method. This invention employs the Through-Silicon-Vias (TSVs) technology to establish vertical electrical connection of the three-dimensional stacking dice and a redistribution layer between a blind hole-on-pad and a vertical through hole formed by the TSVs technology to direct the electrical connection from a first surface to an opposite second surface of this structure. In addition, this invention employs a conductive bump completely covering the pads jointed together between the stacking dice to avoid breakage of the pads. The reliability of the three-dimensional stacking dice of the present invention is increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.