Method for fabricating a gate structure
US8535998B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2010 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Mar 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses an exemplary method for fabricating a gate structure comprising depositing and patterning a dummy oxide layer and a dummy gate electrode layer on a substrate; surrounding the dummy oxide layer and the dummy gate electrode layer with a sacrificial layer; surrounding the sacrificial layer with a nitrogen-containing dielectric layer; surrounding the nitrogen-containing dielectric layer with an interlayer dielectric layer; removing the dummy gate electrode layer; removing the dummy oxide layer; removing the sacrificial layer to form an opening in the nitrogen-containing dielectric layer; and depositing a gate dielectric; and depositing a gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.