Semiconductor device
US8536694B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 5, 2010 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Jul 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/10156
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a structure that can reduce stress due to difference in coefficients of thermal expansion and prevent or suppress generation of cracks, and a semiconductor device manufacturing method, are provided. The semiconductor device includes a single crystal silicon substrate having a main face on which semiconductor elements are formed and a side face intersecting with the main face, and a sealing resin provided covering at least a portion of the side face. The side face covered by the sealing resin is equipped with a first face with a plane direction forming an angle of −5° to +5° to the plane direction of the main face.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.