Increasing the number of ranks per channel
US8539145B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2009 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Jun 22, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for increasing a number of ranks per channel. The channel comprises at least one buffered dual in-line memory module (DIMM). The at least one buffered DIMM comprises a conventional number of ranks and a conventional number of pins. The method includes receiving a memory access request at a memory controller, wherein the memory controller comprises a conventional number of pins. The method also includes encoding a plurality of chip-select (CS) signals at the memory controller, wherein the plurality of CS signals are based on the memory access request, such that the number of ranks per channel increases compared to a conventional number of ranks per channel while not requiring an increase in the number of pins in the memory controller compared to the conventional number of pins of the memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.