System and method for data recovery in multi-level cell memories
US8539311B2 · kind B2 · utility
19Cited by
78References
55Claims
0Family size
Assignee
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Key dates
| Filing date | May 26, 2011 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | May 2, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for data recovery in a multi-level cell memory device. One or more bits may be programmed sequentially in one or more respective levels of multi-level cells in the memory device. An interruption of programming a subsequent bit in a subsequent second or greater level of the multi-level cells may be detected. Data may be recovered from the multi-level cells defining the one or more bits programmed preceding the programming interruption of the second or greater level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.