Patent · US Active

Apparatus and method for correcting at least one bit error within a coded bit sequence

US8539321B2 · kind B2 · utility

1Cited by

6References

22Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Kern · Munich, DE
Ulrich Backhausen · Taufkirchen, DE
Michael Goessel · Roter Dudel, DE
Thomas Rabenalt · Unterhaching, DE
Stephane Lacouture · Schiltigheim, FR

Key dates

Filing date	Nov 10, 2010
Grant date	Sep 17, 2013
Priority date	—
Expiry date	Feb 17, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/6575
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An apparatus for correcting at least one bit error within a coded bit sequence includes an error syndrome generator and a bit error corrector. The error syndrome generator determines the error syndrome of a coded bit sequence derived by a multiplication of a check matrix with a coded bit sequence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.