Method and implementation of cyclic redundancy check for wide databus
US8539326B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2011 |
| Grant date | Sep 17, 2013 |
| Priority date | — |
| Expiry date | Apr 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0061
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for computing a X-bit cyclical redundancy check (CRC-X) frame value for a data frame transmitted over a N-bit databus is provided. The method includes receiving a N-bit data input with an end-of-frame for the data frame at bit position M on the N-bit databus, performing a bitwise XOR on X most significant bits of the N-bit data input with a CRC-X feedback value to form a first N-bit intermediate data. The method also includes shifting the first N-bit intermediate data by M bit positions to align the end-of-frame of the data frame with a least significant bit (LSB), and padding M number of zero bits to a most significant bit (MSB) of the first N-bit intermediate data to form a second N-bit intermediate data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.