FinFET transistor with high-voltage capability and CMOS-compatible method for fabricating the same

US8541267B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Jan Sonsky · Leuven, BE
• Anco Heringa · Eindhoven, NL

Key dates

• Filing date: Mar 20, 2009
• Grant date: Sep 24, 2013
• Expiry date: Aug 5, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

The present invention relates to a method for fabricating a FinFET on a substrate. The method comprises providing a substrate with an active semiconductor layer on an insulator layer, and concurrently fabricating trench isolation regions in the active semiconductor layer for electrically isolating different active regions in the active semiconductor layer from each other, and trench gate-isolation regions in the active semiconductor layer for electrically isolating at least one gate region of the FinFET in the active semiconductor layer from a fin-shaped channel region of the FinFET in the active semiconductor layer.