Semiconductor device with wake-up unit
US8543856B2 · kind B2 · utility
4Cited by
7References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2011 |
| Grant date | Sep 24, 2013 |
| Priority date | — |
| Expiry date | Sep 28, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3206
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a low power mode includes a buffer circuit associated with an interface pad, a power management controller (PMC), and a wakeup unit for waking up a part of the device from the low power mode. The buffer circuit is disabled in the low power mode by asserting a power on reset (POR) signal associated with the PMC. A wakeup signal is generated and provided to the wakeup unit from an analog power supply associated with the buffer circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.