Memory element and memory device
US8546782B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Jun 21, 2011 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Sep 13, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.