Non-volatile memory cell and fabricating method thereof
US8546871B2 · kind B2 · utility
5Cited by
5References
7Claims
0Family size
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Key dates
| Filing date | Jul 6, 2011 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Jul 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0413
Abstract
A non-volatile memory cell includes a substrate, two charge trapping structures, a gate oxide layer, a gate and two doping regions. The charge trapping structures are disposed on the substrate separately. The gate oxide layer is disposed on the substrate between the two charge trapping structures. The gate is disposed on the gate oxide layer and the charge trapping structures, wherein the charge trapping structures protrude from two sides of the gate. The doping regions are disposed in the substrate at two sides of the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.