Semiconductor structure and method for manufacturing the same
US8546910B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 24, 2011 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Aug 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6758
Abstract
The present invention provides a semiconductor structure, which comprises a substrate, a semiconductor base, a cavity, a gate stack, sidewall spacers, source/drain regions and a contact layer; wherein, the gate stack is located on the semiconductor base, the sidewall spacers are located on sidewalls of the gate stack, the source/drain regions are embedded within the semiconductor base and located on both sides of the gate stack, the cavity is embedded within the substrate, and the semiconductor base is suspended over the cavity, the thickness in the middle portion of the semiconductor base is greater than the thicknesses at both ends of the semiconductor base in a direction along the gate length, and both ends of the semiconductor base are connected with the substrate in a direction along the gate width; the contact layer covers exposed surfaces of the source/drain regions. Accordingly, the present invention further provides a method for manufacturing a semiconductor structure, which is favorable for reducing the contact resistance at the source/drain regions, enhancing the device performance, lowering the cost and simplifying the manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.