Electrostatic discharge protection having parallel NPN and PNP bipolar junction transistors
US8546917B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2011 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Aug 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/711
Abstract
A semiconductor structure and a manufacturing method and an operating method for the same are provided. The semiconductor structure comprises a first well region, a second well region, a first doped region, a second doped region, an anode, and a cathode. The second well region is adjacent to the first well region. The first doped region is on the second well region. The second doped region is on the first well region. The anode is coupled to the first doped region and the second well region. The cathode is coupled to the first well region and the second doped region. The first well region and the first doped region have a first conductivity type. The second well region and the second doped region have a second conductivity type opposite to the first conductivity type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.