Stacked package including spacers and method of manufacturing the same
US8546938B2 · kind B2 · utility
7Cited by
20References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2011 |
| Grant date | Oct 1, 2013 |
| Priority date | — |
| Expiry date | Dec 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stacked package and method of manufacture are provided. The stacked package may include a first semiconductor package, a second semiconductor package, plugs and spacers. The second semiconductor package may be stacked on the first semiconductor package. The plugs may electrically connect the first semiconductor to the second semiconductor package. The spacer may be interposed between the first semiconductor package and the second semiconductor package to form a gap between the first semiconductor package and the second semiconductor package, thereby preventing an electrical short between the plugs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.