Patent · US Active

Alignment marks to enable 3D integration

US8546961B2 · kind B2 · utility

8Cited by
19References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 10, 2011
Grant dateOct 1, 2013
Priority date
Expiry dateJan 30, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D88/01
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Disclosed are a structure including alignment marks and a method of forming alignment marks in three dimensional (3D) structures. The method includes forming apertures in a first surface of a first semiconductor substrate; joining the first surface of the first semiconductor substrate to a first surface of a second semiconductor substrate; thinning the first semiconductor on a second surface of the first semiconductor substrate to provide optical contrast between the apertures and the first semiconductor substrate; and aligning a feature on the second surface of the first semiconductor substrate using the apertures as at least one alignment mark.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.