Enhancement normally off nitride semiconductor device manufacturing the same
US8551821B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2010 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Dec 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
Abstract
The present invention relates to an enhancement normally off nitride semiconductor device and a method of manufacturing the same. The method includes the steps of: forming a buffer layer on a substrate; forming a first nitride semiconductor layer on the buffer layer; forming a second nitride semiconductor layer on the first nitride semiconductor layer; etching a gate region above the second nitride semiconductor layer up to a predetermined depth of the first nitride semiconductor layer; forming an insulating film on the etched region and the second nitride semiconductor layer; patterning a source/drain region, etching the insulating film in the source/drain region, and forming electrodes in the source/drain region; and forming a gate electrode on the insulating film in the gate region. In this manner, the present invention provides a method of easily implementing a normally off enhancement semiconductor device by originally blocking 2DEG which is generated under a gate region. In addition, the present invention provides an enhancement normally off power semiconductor device with a simple and efficient driving circuit in a HEMT device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.