Method of fabricating semiconductor device having buried wiring and related device
US8557691B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 17, 2012 |
| Grant date | Oct 15, 2013 |
| Priority date | — |
| Expiry date | Jul 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes forming a sacrificial pattern having SiGe on a crystalline silicon substrate. A body having crystalline silicon is formed on the sacrificial pattern. At least one active element is formed on the body. An insulating layer is formed to cover the sacrificial pattern, the body, and the active element. A contact hole is formed to expose the sacrificial pattern through the insulating layer. A void space is formed by removing the sacrificial pattern. An amorphous silicon layer is formed in the contact hole and the void space. The amorphous silicon layer is transformed into a metal silicide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.