Method using low temperature wafer bonding to fabricate transistors with heterojunctions of Si(Ge) to III-N materials
US8558285B2 · kind B2 · utility
3Cited by
2References
21Claims
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Key dates
| Filing date | Mar 23, 2011 |
| Grant date | Oct 15, 2013 |
| Priority date | — |
| Expiry date | Mar 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/475
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating an electronic device, comprising wafer bonding a first semiconductor material to a III-nitride semiconductor, at a temperature below 550° C., to form a device quality heterojunction between the first semiconductor material and the III-nitride semiconductor, wherein the first semiconductor material is different from the III-nitride semiconductor and is selected for superior properties, or preferred integration or fabrication characteristics in the injector region as compared to the III-nitride semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.