Patent · US Active

Data transfer optimized software cache for irregular memory references

US8561043B2 · kind B2 · utility

9Cited by

8References

18Claims

0Family size

Assignees

Inventors

Eduard Ayguade · Barcelona, ES
Tong Chen · Brookline, US
Alexandre E. Eichenberger · Chappaqua, US
Marc Gonzalez Tallada · Yorktown Heights, US
Xavier Martorell · Barcelona, ES
John Kevin Patrick O'Brien · South Salem, US
Kathryn M. O'Brien · South Salem, US
Zehra N. Sura · Yorktown Heights, US
Tao Zhang · Beijing, CN

Key dates

Filing date	Mar 28, 2008
Grant date	Oct 15, 2013
Priority date	—
Expiry date	Aug 12, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F8/4442
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Mechanisms are provided for optimizing irregular memory references in computer code. These mechanisms may parse the computer code to identify memory references in the computer code. These mechanisms may further classify the memory references in the computer code as either regular memory references or irregular memory references. Moreover, the mechanisms may transform the computer code, by a compiler, to generate transformed computer code in which irregular memory references access a storage of a software cache of a data processing system through a transactional cache mechanism of the software cache.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.