Patent · US Active

End-cut first approach for critical dimension control

US8563410B2 · kind B2 · utility

7Cited by
1References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 25, 2009
Grant dateOct 22, 2013
Priority date
Expiry dateNov 20, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for fabricating a semiconductor device is disclosed. The method includes forming at least one material layer over a substrate; performing an end-cut patterning process to form an end-cut pattern overlying the at least one material layer; transferring the end-cut pattern to the at least one material layer; performing a line-cut patterning process after the end-cut patterning process to form a line-cut pattern overlying the at least one material layer; and transferring the line-cut pattern to the at least one material layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.