Patent · US Active

Transistors and rectifiers utilizing hybrid electrodes and methods of fabricating the same

US8564020B2 · kind B2 · utility

10Cited by

2References

28Claims

0Family size

Assignee

The Hong Kong University of Science and Technology

Inventors

Jing Chen · Hong Kong, CN
Chunhua Zhou · Suzhou, CN

Key dates

Filing date	Jul 26, 2010
Grant date	Oct 22, 2013
Priority date	—
Expiry date	Mar 24, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH10D62/8503
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Systems, methods, and apparatus described herein are associated with devices including hybrid electrodes. A heterostructure semiconductor transistor can include a III-N-type semiconductor heterostructure including a barrier layer overlying an active layer and a hybrid electrode region including a hybrid drain electrode region. Further, a heterostructure semiconductor rectifier can include a III-N-type semiconductor heterostructure and a hybrid electrode region including a hybrid cathode electrode region. Furthermore, the hybrid electrode region of the transistor and rectifier can include permanently trapped charge located under a Schottky contact of the hybrid electrode region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.