Secure random number generator
US8566377B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2008 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Nov 12, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random number generator circuit includes a first memory having multiple storage elements. Each of the storage elements has an initial state corresponding thereto when powered up by a voltage supply source applied to the first memory. The first memory is operative to generate a first signal including multiple bits indicative of the respective initial states of the storage elements. The random number generator circuit further includes an error correction circuit coupled to the first memory. The error correction circuit is operative to receive the first signal and to correct at least one bit in the first signal that is not repeatable upon successive applications of power to the first memory to thereby generate a second signal. The second signal is a random number that is repeatable upon successive applications of power to the first memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.