Wayne E. Werner
36Patents
9h-index
16Co-inventors
68Inventor score
Filing activity: Sep 29, 1997 → Sep 29, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8516408B2 | Optimization of circuits having repeatable circuit instances | Electricity | 155 | Active |
| US6147520A | Integrated circuit having controlled impedance | Electricity | 50 | Expired |
| US7872929B2 | Accessing memory cells in a memory circuit | Electricity | 14 | Active |
| US7746692B2 | Multiple-level memory with analog read | Physics | 13 | Active |
| US8566377B2 | Secure random number generator | Physics | 11 | Active |
| US6014039A | CMOS high voltage drive output buffer | Electricity | 11 | Expired |
| US6064231A | CMOS input buffer protection circuit | Electricity | 11 | Expired |
| US5966042A | Current steering output circuit with switchable shunt resistor | Electricity | 11 | Expired |
| US7742355B2 | Dynamic random access memory with low-power refresh | Physics | 10 | Active |
| US7898887B2 | Sense amplifier with redundancy | Physics | 7 | Active |
| US8023348B2 | Method and apparatus for testing a memory device | Physics | 6 | Active |
| US5963083A | CMOS reference voltage generator | Physics | 5 | Expired |
| US8139412B2 | Systematic error correction for multi-level flash memory | Physics | 5 | Active |
| US7848172B2 | Memory circuit having reduced power consumption | Physics | 5 | Active |
| US5952866A | CMOS output buffer protection circuit | Electricity | 5 | Expired |
| US8156402B2 | Memory device with error correction capability and efficient partial word write operation | Physics | 4 | Active |
| US7633830B2 | Reduced leakage driver circuit and memory device employing same | Physics | 4 | Active |
| US8468419B2 | High-reliability memory | Electricity | 4 | Active |
| US7391633B2 | Accelerated searching for content-addressable memory | Physics | 3 | Active |
| US8125842B2 | Tracking circuit for reducing faults in a memory | Physics | 3 | Active |
| US7930615B2 | Memory device with error correction capability and preemptive partial word write operation | Physics | 3 | Active |
| US8405412B2 | Integrated circuit self-monitored burn-in | Physics | 3 | Active |
| US7826301B2 | Word line driver circuit with reduced leakage | Physics | 3 | Active |
| US7551512B2 | Dual-port memory | Physics | 3 | Active |
| US7755948B2 | Process and temperature tolerant non-volatile memory | Physics | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.