North-bridge to south-bridge protocol for placing processor in low power state
US8566628B2 · kind B2 · utility
9Cited by
49References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 6, 2009 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | May 19, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor integrated circuit has one or more processor cores and a power management controller in a North-Bridge that generates a first power state recommendation for the one or more processor cores. The North-Bridge also receives a second power state recommendation from a South-Bridge integrated circuit. The North-Bridge determines a final power state for the one or more processor cores based on the first and second power state recommendations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.