Decoding and optimized implementation of SECDED codes over GF(q)
US8566684B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 26, 2011 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Mar 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/152
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A plurality of columns for a check matrix that implements a distance d linear error correcting code are populated by providing a set of vectors from which to populate the columns, and applying to the set of vectors a filter operation that reduces the set by eliminating therefrom all vectors that would, if used to populate the columns, prevent the check matrix from satisfying a column-wise linear independence requirement associated with check matrices of distance d linear codes. One of the vectors from the reduced set may then be selected to populate one of the columns. The filtering and selecting repeats iteratively until either all of the columns are populated or the number of currently unpopulated columns exceeds the number of vectors in the reduced set. Columns for the check matrix may be processed to reduce the amount of logic needed to implement the check matrix in circuit logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.