Nonvolatile semiconductor memory device capable of speeding up write operation
US8570802B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 18, 2011 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Sep 18, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3454
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array, write circuit, memory unit, and voltage generation unit. A plurality of strings is arranged in the memory cell array, each of which includes a plurality of memory cells connected to word lines. The write circuit selects a first string selected as a sample from the memory cell array, and writes data to the memory cell. The memory unit holds, for each word line, the number of write operations to each memory cell of the first string. When data is written to each memory cell of a second string other than the first string, the voltage generation unit generates an initial write voltage based on the number of write operations, which corresponds to the selected word line and is read out from the memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.