Transmitter voltage and receiver time margining
US8570881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2007 |
| Grant date | Oct 29, 2013 |
| Priority date | — |
| Expiry date | Jun 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/20
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A technique for characterizing a communications interface includes determining a voltage margin and a timing margin of the interface based on data sampled by a sampling device of a receiver of the interface. In at least one embodiment of the invention, a method for determining margin associated with a receiver circuit of an integrated circuit includes periodically sampling a signal over a time period by a receiver sampling circuit of the receiver circuit to generate a sampled version of the signal. The method includes incrementally varying a value of the parameter associated with the signal. The varying of the parameter is through a range of values of the parameter over the time period. The method includes determining a margin value of the receiver circuit associated with the parameter based, at least in part, on the sampled version of the signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.