Method for reducing thickness of interfacial layer, method for forming high dielectric constant gate insulating film, high dielectric constant gate insulating film, high dielectric constant gate oxide film, and transistor having high dielectric constant gate oxide film
US8575038B2 · kind B2 · utility
3Cited by
1References
10Claims
0Family size
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Key dates
| Filing date | May 29, 2012 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | May 29, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a method for reducing a thickness of an interfacial layer, which contains: (a) forming a film of an oxide of a first metal on a semiconductor layer via an oxide film of a semiconducdor serving as an interfacial layer; and (b) forming a film of an oxide of a second metal on the film of the oxide of the first metal, where the second metal has higher valency than that of the first metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.