Lattice matched semiconductor growth on crystalline metallic substrates
US8575471B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2009 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | Aug 18, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a′) that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.