Through-silicon vias for semicondcutor substrate and method of manufacture
US8575725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | Mar 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor component includes a semiconductor substrate having a top surface. An opening extends from the top surface into the semiconductor substrate. The opening includes an interior surface. A first dielectric liner having a first compressive stress is disposed on the interior surface of the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. A metal barrier layer is disposed on the third dielectric liner. A conductive material is disposed on the metal barrier layer and fills the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.