Inventor · Chuantou, TW

Ebin Liao

21Patents
4h-index
29Co-inventors
59Inventor score

Filing activity: Sep 25, 2009 → Sep 15, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US8487410B2 Through-silicon vias for semicondcutor substrate and method of manufacture Electricity 6 Active
US8803322B2 Through substrate via structures and methods of forming the same Electricity 5 Active
US9087878B2 Device with through-silicon via (TSV) and method of forming the same Electricity 5 Active
US8525343B2 Device with through-silicon via (TSV) and method of forming the same Electricity 5 Active
US10269611B1 Method and apparatus for bonding semiconductor devices Electricity 4 Active
US9263382B2 Through substrate via structures and methods of forming the same Electricity 3 Active
US9899467B2 Semiconductor devices, methods of manufacture thereof, and capacitors Electricity 2 Active
US10672737B2 Three-dimensional integrated circuit structure and method of manufacturing the same Electricity 1 Active
US10784162B2 Method of making a semiconductor component having through-silicon vias Electricity 1 Active
US9418923B2 Semiconductor component having through-silicon vias and method of manufacture Electricity 1 Active
US10115634B2 Semiconductor component having through-silicon vias and method of manufacture Electricity 1 Active
US8575725B2 Through-silicon vias for semicondcutor substrate and method of manufacture Electricity 1 Active
US10727294B2 Semiconductor devices, methods of manufacture thereof, and capacitors Electricity 0 Active
US10872874B2 Bonding apparatus and method of bonding substrates Electricity 0 Active
US8729695B2 Wafer level package and a method of forming a wafer level package Electricity 0 Active
US10867831B1 Method and apparatus for bonding semiconductor devices Electricity 0 Active
US11545392B2 Semiconductor component having through-silicon vias Electricity 0 Active
US9847256B2 Methods for forming a device having a capped through-substrate via structure Electricity 0 Active
US10748803B2 Method and apparatus for bonding semiconductor devices Electricity 0 Active
US9514986B2 Device with capped through-substrate via structure Electricity 0 Active
US12051672B2 Package structure and method of forming the same Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.