Piecewise processing of overlap smoothing and in-loop deblocking
US8576924B2 · kind B2 · utility
7Cited by
18References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 25, 2005 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | Jun 5, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/82
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A video processing apparatus and methodology are implemented as a combination of a processor and a video decoding hardware block to decode video data by performing piecewise processing of overlap smoothing and in-loop deblocking in a macroblock-based fashion. With this approach, a smaller on-board memory may be used for the in-loop filtering operations of the video decoding hardware block. By pipelining the piecewise processing operations, latency in the filtering operations is hidden and the filtering output is smoothed, thereby avoiding the need for bursts of fetching and storing of blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.