Arithmetic counter circuit, configuration and application for high performance CMOS image sensors
US8576979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 3, 2012 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | Feb 3, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.