Processing method for bump-included device wafer
US8580655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2012 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Apr 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67092
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A processing method for a bump-included device wafer which includes an adhesive providing step of providing an adhesive in an annular groove of a carrier wafer so that the adhesive projects from the upper surface of an annular projection of the carrier wafer; a wafer attaching step of attaching and fixing the front side of the device wafer through the adhesive to the front side of the carrier wafer so as to accommodate bumps in a recess of the carrier wafer after performing the adhesive providing step; and a thickness reducing step of grinding or polishing the back side of the device wafer to reduce the thickness of the device wafer to a predetermined thickness after performing the wafer attaching step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.