Multiplying digital-to-analog converter configured to maintain impedance balancing
US8581769B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2011 |
| Grant date | Nov 12, 2013 |
| Priority date | — |
| Expiry date | Jan 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/806
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A multiplying digital-to-analog converter suited to maintain impedance balancing during phases. In an embodiment, an input signal may be sampled onto nodes of impedance elements during an initial phase. In a second phase the impedance elements are directly coupled either to a non-inverting reference input or the inverting reference input of an amplifier depending on an output of a related flash ADC output. The determination as to which capacitor is to be coupled to inverting or non-inverting input nodes may be directly programmed into the MDAC using switches, such that a thermometric to binary converter is not required in an example embodiment. Thus, the number of impedance elements coupled to the non-inverting reference input or inverting reference input REFM remains constant in each cycle such that there is no need to settle the non-inverting reference input or inverting reference input to full accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.